IEEE 1800-2005 标准详情
- 标准号:IEEE 1800-2005
- 中文标题:verilog系统.标准硬件设计、规范和检定语言
- 英文标题:systemverilog unified hardware design, specification, and verification language ieee computer society document
- 标准类别:国际电工协会标准IEEE
- 发布日期:2005-11-08
A set of extensions to the IEEE P1364 Verilog Hardware Description Language to aid in the reaction and verification of abstract architectural level models. Includes design specification methods, embedded assertions language, test bench language inclu
* 特别声明:资源收集自网络或用户上传,本网站所提供的电子文本仅供参考,请以正式出版物为准。仅供个人标准化学习,研究使用。如有侵权,请及时联系我们!
